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ISO1I811T
Pin Configuration and Functionality
1.2.2
Pins of Serial and Parallel logic Interface
Some pins are common for both interface types, some others are specific for the parallel or serial access.
VCC (Positive 3.3 / 5V logic supply)
VCC supplies the output interface that is electrically isolated from the sensor input stage. The interface can be
supplied with 3.3 / 5V.
GND (Ground for VCC domain)
This pin is the ground reference for the uC-interface that is supplied by VCC.
ROSC (Clock Adjustment)
A high precision resistor has to be connected between ROSC and GND to guarantee the frequency accuracy of
the sampling clock. For details see Chapter 3.3 .
ERR (Error Output)
The low active ERR signal contains the OR-wired information of the sensor input missing voltage (MV) detection
and the internal data transmission failure detection unit. The output pin ERR provides an open drain functionality.
A current source is also connected to the pin ERR. In normal operation the signal ERR is high. See Chapter 3.5
for more details.
DS0, DS1 (Filter Select)
The internal filter delay can be selected by pulling those pins to VCC or to GND (see Table 10 ). These pins are
for static configuration (pin-strapping).
CS (Chip Select)
When this pin is in a logic Low state, the IC interface is enabled and data can be transferred.
SEL (Serial or Parallel Mode Select)
When this pin is in a logic High state, the IC operates in Serial Mode. For Parallel Mode operation the pin has to
be pulled into logic Low state. This pin has an internal Pull-UP resistor.
The following pins are provided by the parallel interface
D7:D0 (Data output bit7 ... bit0)
Th e pins D0 .. D7 are the outputs for data read.
RD (Read Select )
By pulling this pin down, a read transaction is initiated on the data bus and the data becomes valid.
The following pins are provided by the serial interface
SCLK (Serial interface shift clock)
Output data is updated with the falling edge of this input clock signal.
SDI (Serial interface input data)
SDI is put into a FIFO dedicated to the sensor data bits (no internal registers Write operation supported, only daisy
chain). Input data is sampled with the rising edge of SCLK.
SDO (Serial interface data)
SDO provides the sensor data bits.
Data Sheet
9
Revision 2.0, 2012-06-14
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